On 5/15/2025 8:41 AM, Sean Christopherson wrote: > Again, use more precise language. "Configure interceptions" is akin to "do work". > It gives readers a vague idea of what's going on, but this > > KVM: x86/pmu: Disable interception of select PMU MSRs for mediated vPMUs > > is just as concise, and more descriptive. Yes, absolutely. Thanks. > >> + /* >> + * In mediated vPMU, intercept global PMU MSRs when guest PMU only owns >> + * a subset of counters provided in HW or its version is less than 2. >> + */ >> + if (kvm_mediated_pmu_enabled(vcpu) && kvm_pmu_has_perf_global_ctrl(pmu) && >> + pmu->nr_arch_gp_counters == kvm_pmu_cap.num_counters_gp) > This logic belongs in common code. Just because AMD doesn't have fixed counters > doesn't mean KVM can't have a superfluous "0 == 0" check. Yes. > >> + if (kvm_mediated_pmu_enabled(vcpu) && kvm_pmu_has_perf_global_ctrl(pmu) && > Just require the guest to have PERF_GLOBAL_CTRL, I don't see any reason to support > v1 PMUs. It adds complexity and weirdness, and I can't imagine there's a use case. Ok.
