On Thu, May 01, 2025 at 02:46:06PM +0100, Marc Zyngier wrote:
> On Thu, 01 May 2025 11:11:36 +0100,
> Joey Gouly <joey.gouly@xxxxxxx> wrote:
> >
> > On Sat, Apr 26, 2025 at 01:28:02PM +0100, Marc Zyngier wrote:
> > > Bulk addition of all the system registers trapped by HFG{R,W}TR2_EL2.
> > >
> > > The descriptions are extracted from the BSD-licenced JSON file part
> > > of the 2025-03 drop from ARM.
> > >
> > > Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
> > > ---
> > > arch/arm64/tools/sysreg | 395 ++++++++++++++++++++++++++++++++++++++++
> > > 1 file changed, 395 insertions(+)
> > >
> > > diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> > > index 6433a3ebcef49..7969e632492bb 100644
> > > --- a/arch/arm64/tools/sysreg
> > > +++ b/arch/arm64/tools/sysreg
> > > @@ -2068,6 +2068,26 @@ Field 1 A
> > > Field 0 M
> > > EndSysreg
> > >
> > > +Sysreg SCTLR_EL12 3 5 1 0 0
> > > +Mapping SCTLR_EL1
> > > +EndSysreg
> > > +
> > > +Sysreg SCTLRALIAS_EL1 3 0 1 4 6
> > > +Mapping SCTLR_EL1
> > > +EndSysreg
> > > +
> > > +Sysreg ACTLR_EL1 3 0 1 0 1
> > > +Field 63:0 IMPDEF
> > > +EndSysreg
> > > +
> > > +Sysreg ACTLR_EL12 3 5 1 0 1
> > > +Mapping ACTLR_EL1
> > > +EndSysreg
> > > +
> > > +Sysreg ACTLRALIAS_EL1 3 0 1 4 5
> > > +Mapping ACTLR_EL1
> > > +EndSysreg
> > > +
> >
> > Do you want to update CPACR_EL1 while you're at it, so that it matches
> > CPACRMASK_EL1?
>
> Do you mean adding the TAM and TCPAC bits added by FEAT_NV2p1? Sure,
> no problem. I'll probably add that as a separate patch though, as I
> want this one to only be concerned with the FEAT_FGT2-controlled
> accessors.
Yep, sounds good.
>
> Thanks,
>
> M.
>
> --
> Without deviation from the norm, progress is not possible.
