On Tue, Apr 22, 2025 at 10:25:44AM +0200, Alexandre Ghiti wrote: > RV_X() macro is defined in two different ways which is error prone. > > So harmonize its first definition and add another macro RV_X_mask() for > the second one. > > Signed-off-by: Alexandre Ghiti <alexghiti@xxxxxxxxxxxx> > --- > arch/riscv/include/asm/insn.h | 39 ++++++++++++++-------------- > arch/riscv/kernel/elf_kexec.c | 1 - > arch/riscv/kernel/traps_misaligned.c | 1 - > arch/riscv/kvm/vcpu_insn.c | 1 - > 4 files changed, 20 insertions(+), 22 deletions(-) > > diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h > index 2a589a58b291..4063ca35be9b 100644 > --- a/arch/riscv/include/asm/insn.h > +++ b/arch/riscv/include/asm/insn.h > @@ -288,43 +288,44 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) > > #define RV_IMM_SIGN(x) (-(((x) >> 31) & 1)) > #define RVC_IMM_SIGN(x) (-(((x) >> 12) & 1)) > -#define RV_X(X, s, mask) (((X) >> (s)) & (mask)) > -#define RVC_X(X, s, mask) RV_X(X, s, mask) > +#define RV_X(X, s, n) (((X) >> (s)) & ((1 << (n)) - 1)) Assuming n is arbitrary then we should be using BIT_ULL. Thanks, drew
