With HW PTW supported, stale TLB is not added if page fault happens. With EXCCODE_TLBM exception, stale TLB may exist because last read access, tlb flush operation is necessary with EXCCODE_TLBM exception, and not necessary with other memory page fault exceptions. With SW PTW supported, invalid TLB is added in TLB refill exception. TLB flush operation is necessary with all page fault exceptions. Bibo Mao (2): LoongArch: KVM: Add parameter exception code with exception handler LoongArch: KVM: Do not flush tlb if HW PTW supported arch/loongarch/include/asm/kvm_host.h | 2 +- arch/loongarch/include/asm/kvm_vcpu.h | 2 +- arch/loongarch/kvm/exit.c | 34 +++++++++++++-------------- arch/loongarch/kvm/mmu.c | 17 ++++++++++---- 4 files changed, 31 insertions(+), 24 deletions(-) base-commit: 9d7a0577c9db35c4cc52db90bc415ea248446472 -- 2.39.3
