Initialize the APIC ID in the Secure AVIC APIC backing page with
the APIC_ID msr value read from Hypervisor. CPU topology evaluation
later during boot would catch and report any duplicate APIC ID for
two CPUs.
Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@xxxxxxx>
---
Changes since v3:
- No change.
arch/x86/kernel/apic/x2apic_savic.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c
index 4761afc7527d..81d932061b7b 100644
--- a/arch/x86/kernel/apic/x2apic_savic.c
+++ b/arch/x86/kernel/apic/x2apic_savic.c
@@ -144,12 +144,25 @@ static void savic_write(u32 reg, u32 data)
}
}
+static void init_apic_page(void)
+{
+ u32 apic_id;
+
+ /*
+ * Before Secure AVIC is enabled, APIC msr reads are intercepted.
+ * APIC_ID msr read returns the value from the Hypervisor.
+ */
+ apic_id = native_apic_msr_read(APIC_ID);
+ set_reg(APIC_ID, apic_id);
+}
+
static void savic_setup(void)
{
void *backing_page;
enum es_result res;
unsigned long gpa;
+ init_apic_page();
backing_page = this_cpu_ptr(apic_page);
gpa = __pa(backing_page);
--
2.34.1
