On Tue, 2025-06-03 at 11:01 +0100, Tim Froggatt via Gcc-help wrote: > Hello. > > I'm compiling C software for an embedded ARM system with -mcpu=cortex-a8 > Currently my build system uses GCC version 12.2.1. But current GCC is GCC 15. I recommend compiling GCC 15 from its source code on a Linux computer. > > I've been investigating the effects of -falign-functions=n:m > "Align the start of functions to the next power-of-two greater than or equal > to n, skipping up to m-1 bytes." > > I've set n=64 and I'm trying different values for m... > -falign-functions=64:5 > -falign-functions=64:6 > -falign-functions=64:7 > -falign-functions=64:8 > etc. > > m=5,6,7,8 all give similar output. The same for m=9,10,11,12. This is what I'd > expect since all ARM32 instructions are 4 bytes long, so would be aligned at a > minimum on 4-byte boundaries. > > However I'm confused by m=1,2,3,4. m=1 gives a very different result to 2,3,4 > (and in my case performance is considerably worse for m=1). What is > -falign-functions=64:1 doing here? > > Also, what does it even mean when m=2, 3 or 4? If instructions are 4 bytes > long, > then I thought this wouldn't actually be doing any alignment. But it gives a > different result to specifying -fno-align-functions, so presumably there is > something I'm misunderstanding? A possibility to increase performance of the compiler (and the speed of the generated by the compiler code) would be to develop your GCC plugin. See for inspiration https://arxiv.org/abs/1109.0779 and https://github.com/bstarynk/bismon regards -- Basile STARYNKEVITCH <basile@xxxxxxxxxxxxxxxxx> 8 rue de la Faïencerie http://starynkevitch.net/Basile/ 92340 Bourg-la-Reine https://github.com/bstarynk France https://github.com/RefPerSys/RefPerSys
