Re: ARMv7: VLDR instruction for unaligned address (GCC 9.5.0)

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* Christian Gudrian via Gcc-help:

> Hello!
>
> I'm currently dealing with what looks like a compiler bug to me: the
> compiler generates a VLDR instruction for an address that at runtime
> may not be 4-byte-aligned. So far, we have encountered this behavior
> only when passing variables to the spdlog logging function. Here's an
> example: https://godbolt.org/z/168PaedWz (unfortunately, I have not
> been able to reduce the example any further). The offending
> instruction is on line 17416 in the generated assembly:
>
> vldr.64 d16, [r3]
>
> During runtime register r3 contains the address to `data.id` which is
> not correctly aligned.

I don't think the C++ type system models non-natural alignment for
references.  The called function has this signature:

void spdlog::logger::log_<unsigned long long&>(spdlog::source_loc,
  spdlog::level::level_enum, fmt::v9::basic_string_view<char>,
  unsigned long long&)

And the callee assumes that the reference target is naturally aligned.

Thanks,
Florian




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